The ideal candidates for this position will have:

• Working on the next generation protocols for AI applications
• Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create architecture and micro-architecture with detailed design documents for some of the components of the design for medium to high complexity functionality.
• Be an individual contributor in the Design Tasks – RTL coding of design, synthesis, CDC analysis, debugging, Test development, etc.
• May need to interact with customers to discuss/ understand customers’ specification requirements if needed.
• The candidate will work in a project and team-oriented environment with teams.

Preferred skills for this role include:

• Extensive experience in ASIC designing, RTL programming, Microarchitecture on major blocks, Verilog & Verification skills.
• Solid understanding of ASIC design flow – logic design, verification, synthesis, STA, and backend.
• Language Proficiency - C/C++, Python, MATLAB 4. Good knowledge in at least one/two of these protocols - HBM or DDR, Ethernet, Interlaken, AMBA.
• Exposure to Integration of PCIe, DDR, HBM, MIPI, CPU IPs in AI/ML and High-performance computing applications.
• Across 2- 15 years of experience.